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lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 1 preliminary lc 5830k data sheet rev. 0. 3 the c ontents in this data sheet are preliminary, a nd are subject to changes without notice. sanken electric co., ltd. http://www.sanken - ele.co.jp
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 2 preliminary contents general descriptions -------------------------------- -------------------------------- ---------- 3 1. absolute maximum ratings -------------------------------- ------------------------------ 4 2. recommended operation conditions -------------------------------- ------------------- 4 3. electrical characteristics -------------------------------- -------------------------------- -- 5 4. functional block diagram -------------------------------- -------------------------------- 7 5. pin assig nment & functions -------------------------------- ------------------------------ 7 6. typical application circuit -------------------------------- ------------------------------- 8 7. package information -------------------------------- -------------------------------- ------- 9 8. functional description -------------------------------- -------------------------------- ---- 10 8.1 sett lement of frequency -------------------------------- -------------------------------- - 10 8.2 enable and dimming -------------------------------- -------------------------------- ----- 11 8.3 range of output voltage -------------------------------- -------------------------------- 11 8.4 thermal budgeting -------------------------------- -------------------------------- ------- 14 8.5 over current protection(ocp) -------------------------------- ------------------------ 14 8.6 component selections ( peripheral parts) -------------------------------- ------------ 14 9. component placement and pcb layout guidelines ------------------------------- 17 10. typical caracteristics(ta=25 important notes -------------------------------- -------------------------------- ------- 25
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 3 preliminary description : the LC5830K is a single ic switching regulator that provides constant - current output to drive high - power leds. it integrates a high - side n - channel dmos switch for dc - to - dc step - down (buck) conversion. a true average current is output using a cycle - by - cycle, controlled on - time method. output current is user - selectable by an externa l current sense resistor. output voltage is automatically adjusted to drive various numbers of leds in a single string. this ensures the optimal system efficiency. led dimming is accomplished by a direct logic input pulse width modulation (pwm) signal at t he enable pin. the device is provided in a compact 8 - pin narrow soic package with exposed pad for enhanced thermal dissipation.it is lead (pb) free, with 100% matte tin leadframe plating. package: esoic8 ( exposed soic8) features and benefits : ? supply voltage 6 to 48 v ? true average output current control ? 3.0 a maximum output over operating temperature range ? cycle - by - cycle current limit ? integrated mosfet switch ? pwm dimming freqency: 100 to 2000hz ? internal control loop compensation ? undervoltage lockout (uvlo) and thermal shutdown protection ? low power shutdown (1 a typical) electrical characteristics range of the input voltage: 6 v ( min ) - 4 8 v( max ) internal mosfet r ds(on ) : 250 m (typ) io (i led ) =3a applications ? general illumination ? scanners and multi - function printers (light bars) ? architectural lighting ? industrial lighting ? display case lighting / mr16 marking
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 4 preliminary 1. absolute maximum ratings ? refer to a specification for contents of details. ? the polarity of the electric current value prescribes "sink = +" and "source = - " based on the ic. ? a condition ta= 25 of the case without special mention. table. 1 characteristic symbol ratings units remarks input supply voltage v in ? 0.3 50 v bootstrap drive voltage v boot ? 0.3 v in +8 v switching voltage v sw ? 1.5 v in +0.3 v linear regulator terminal v cc - 0.3 14 v vcc C gnd enable and ton voltage v en , v ton ? 0.3 v in +0.3 v current sense voltage v cs ? 0.3 7 v allowable power dissipation pd 2.85 w operating ambient temperature t a ? 40 10 5 oc maximum junction temperature t j (max) 150 oc storage temperature t stg ? 5 5 1 50 oc thermal resistance (junction C air) r ja 35 oc/w 4 - layer pcb b ase d on jedec standard thermal resistance (junction C pad ) r j p 2 oc/w (1) but, it is restricted by junction temperature. ( 2 ) but, thermal protection detection temperature is about 165 . (3) you must use it within therma l derating curve of the fig1 . * operation at levels beyond the ratings listed in this table may cause permanent damage to the device. the absolute maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the electrical characteristics table is not implied. exposure to absolute maximum - rated conditions for extended periods may affect device reliability. 2. recommended operation conditions ? r ecommended o peration c onditions are the required operating conditions to maintain the nor mal circuit functions described in the electrical characteristics. in actual operation, it should be within these conditions. ? the polarity value for c urrent specifies a sink a s + and a source as ? referen cing the ic. ? unless specifically noted, ta is 25 c table. 2 characteristic symbol ratings units remarks min max range of vin pin voltage v in 6 48 v range of output current ( 4 ) i o 0 3 a inductor ripple current S il io il operating ambient temperature ( 4 ) t op ? ( 4 ) you must use it within therma l derating curve of the fig1 .
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 5 preliminary 3. electrical characteristics ? refer to a specification for contents of details. ? the polarity of the electric current value prescribes "sink = +" and "source = - " based on the ic. electrical characteristics of control part (mic) valid at v in = 24 v, t a = C 40c to 125c, typical values at t a = 25c; unless otherwise noted table. 3 items symbol ratings units conditions min typ max input supply voltage v i n 6 - 48 v t a =25 c vin undervoltage lockout threshold v uvlo - 5.3 - v v in increasing vin undervoltage lockout hysteresis v uvlohys - 150 - mv v in decreasing vin pin supply current i in - 5 - m a v cs =0.5v, en= h vin pin shutdown current i insd - 1 10 a en shorted to gnd b uck switch current limit threshold i sw lim 3.0 4.0 5.0 a buck switch on - resistance r db(on) - 0.25 0.4 v boot =v in +4.3v, t a =25 c , i sw =1a boot undervoltage lockout threshold v bootuv 1.7 2.9 4.3 v v boot to v sw increasing boot undervoltage lockout hysteresis v boothys - 370 - mv v boot to v sw decreasing switching minimum off - time t o ffmin - 110 150 ns v cs =0v switching minimum on - time t swontime 110 150 ns selected on - time t on 800 1000 1200 ns v in =24v, v out =12v, r on =137 k load current sense regulation threshold v csreg 187.5 200 210 mv v cs decreasing, sw turns on load current sense bias current i csbias - 0.9 - a v cs =0.2v, en=low vcc regulated output v cc 5.0 5.3 5.6 v 0ma6v vcc current limit * i cclim 5 20 - ma v in =24v, v cc =0v logic high voltage v ih 1.8 - - v v en increasing logic low voltage v il - - 0.4 v v en decreasing en pin pull - down resistance r enpd - 100 - k v en =5v maximum pwm dimming off - time t pwml 10 17 - ms measured while en = low, during dimming control, and internal references are powered - on (exceeding tpwml results in shutdown) thermal shutdown activation temperature t sd ? 1 6 5 ? c thermal shutdown hysteresis temperature t sdhys ? 25 ? c * the internal linear regulator is not designed to drive an external load.
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 6 preliminary allowable package power dissipation fig.1 LC5830K thermal derating curve note1 4 - layer pcb b ase d on jedec standard . c opper area: 1inch 1inch =1inch 2 (645.16mm 2 ) /layer , 4 - layer pcb with via connection(blue line) c opper area: 1inch 1inch =1inch 2 (645.16mm 2 ) /layer , double sided pcb with via connection( red line) * j - a grows big when the areas of the radiation pattern in total decrease. note2 as for the "therma l - derating - curve" of the fig 1, it is calculated in consideration of the printed - circuit - board temperature limit = 130 to use mo st in less junction - temperature tj= 125 . note3 p d can be calculat ed with the following equation. p d =(vin i in ) (v out i led ) (i led 2 dcr) {v f i led (1 duty)} ( v cs 2 r sense ) ??? (1) vin input voltage (v) i in input current (a) i led average current of led (a) v f the forward voltage of flyweel - diode (v) dcr dc - resistance of inductor winding ( ) duty v out vin (v out = led string voltage v cs ) v cs =0.2(v) r sense = current detection resistance ( ) * it is based on the mea surement circuit of the fig 2 . fig2 . m ea surement circuit of power dissipation 0 0.5 1 1.5 2 2.5 3 0 25 50 75 100 125 150 p d [w] allowable package power dissipation tj[ 4 - layer pcb double sided pcb j - a =35 w j - a =63 w string voltage
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 7 preliminary 4 . functional block diagram fig 3. function block diagram 5. pin assign ment & functions pin no. symbol functions 1 vin supply voltage input terminals 2 ton regulator on - time setting resistor terminal 3 en logic input for enable and pwm dimming 4 cs drive output current sense feedback 5 vcc internal linear regulator output 6 gnd ground terminal 7 boot d mos gate driver bootstrap terminal 8 sw switched output terminals pad \ exposed pad for enhanced thermal dissipation;connect to gnd fig.4 pin assignment table. 4
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 8 preliminary 6 . typical application circuit fig5. lc 5830k application circuit the application circuit in fig5 shows a design for driving a 15 v led string at 1.3 a (set by rsense ). the switching frequency is 500 khz, as set by r1. as for the c out , a 0.68 f ceramic capacitor is added across the led string to reduce the ripple current through the leds (as shown in figure 17b). * refer to 9.2 demonstration board circuit diagram for the circuit diagram of the demonstration board.
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 9 preliminary 7. package information fig6. package outline for reference only; n ot for tooling use (reference m s - 0 1 2ba ) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier dis cretion within limits shown a termi nal #1 mark area b exposed thermal pad (bottom surface) c reference land pattern layout (reference ipc7351sop65p640x12 0 - 29cm); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirementsand pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51 - 5) units b exposed thermal pad(bottom surface) c foot - printing reference (adjust it corresponding to the application.)
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 10 preliminary 8. functional description the LC5830K is a buck regulator designed for driving a high - current led string. it utilizes average current mode control to maintain constant led current and consistent brightness. the led current level is easily programmable by selection of an external se nse resistor, valued as follows: fig.7 constant led current control i led = v csreg / r sense ??? (2 ) where , v csreg = 0.2 v typical. in other words, by detecting "voltage between both ends" of the "led current detection resistor r sense " that is series connection to led with the cs terminal, it is controlled so that "voltage between both ends" of r sense may become a constant (0.2v). 8.1 sett lement of frequency the LC5830K operates in fixed on - time mode during switching. the on - time (and hence switching frequency) is programmed using an external resistor connected between the vin and t on pins, as given by the following equation: t on = k ( r ton + r int ) ( v out / v in ) ??? (3 ) f sw = 1 / [ k ( r ton + r int )] ??? (4 ) where , k = 0.013, with f sw in mhz, t on in s and r t on in k , r int =5k refer to fig8. fig.8 switching frequency versus r ton resistance constant led current control
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 11 preliminary 8.2 enable and dimming ? enable terminal the ic is activated when a logic high signal is applied to the en (enable) pin. the buck converter ramps up the led current t o a target level set by rsense. when the en pin is forced from high to low, the buck converter is turned off, but the ic remain s in standby mode for up to 10 ms. if en goes high again within this period, the led current is turned on immediately. active dimming of the led is achieved by sending a pwm (pulse - width modulation) signal to the en pin. the resulting led brightness is proport ional to the duty cycle ( t on / period ) of the pwm signal. a practical range for pwm dimming frequency is between 100 hz ( period = 10 ms) and 2 khz. at a 200 hz pwm frequency, the dimming duty cycle can be varied from 100% down to 1% or lower. if en is l ow for more than 17 ms, the ic enters shutdown mode to reduce power consumption. the next high signal on en will initialize a full startup sequence, which includes a startup delay of approximately 130 s. this startup delay is not present during pwm oper ation. the en pin is high - voltage tolerant and can be directly connected to a power supply. however, if en is higher than the v in voltageat any time, a series resistor (1 k) is required to limit the current flowing into the en pin. this series resistor is not necessary if en is driven from a logic input. ? pwm dimming ratio the brightness of the led string can be reduced by adjusting the pwm duty cycle at the en pin as follows: dimming ratio = pwm on - time / pwm period . for example, by selecting a pwm period of 5 ms (200 hz pwm frequency) and a pwm on - time of 50 s, a dimming ratio of 1% can be achieved. in an actual application, the minimum dimming ratio is determined by various system parameters, including: v in , v out , inductance, led current, switching frequency, and pwm frequency. as a general guideline, the minimum pwm on - time should be kept at 50 s or longer. a shorter pwm on - time is acceptable under more favorable operating conditions. 8.3 range of output voltage fig9 provides simplified equations for approximating output voltage. essentially, the output voltage of a buck converter is approximately given as v out = v in d C v d1 (1 C d ) v in d , if v d1 << v in ??? (5 ) d = t on / ( t on + t off ) ??? (6 ) where d is the duty cycle, and vd1 is the forward drop of the schottky diode d1 (typically under 0.5 v). ? during sw on - time : i ripple = [( v in C v out ) / l ] t on ??? v in C v out ) / l ] t d where, d = t on / t ??? ? during sw off - time: i ripple = [( v out C v d1 ) / l ] t off ??? v out C v d1 ) / l ] t (1 C d ) therefore (simplified equation for output voltage): v out = v in d C v d1 (1 C d ) ??? d1 << v out , then v out is ??? out in d. ??? more precisely ??? v out = ( v in C i av r ds(on) ) d C v d (1 C d ) C r l i av ??? w here , r l is the resistance fo the inductor. fig.9 simplified buck controller equations
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 12 preliminary for a given input voltage, the maximum output voltage depends on the switching frequency and minimum t off . for example, if t off (min) = 150ns and f sw = 1 mhz, then the maximum duty cycle is 85%. so for a 24v input, the maximum output is 20.3v. this means u p to 6 leds can be operated in series, assuming vf = 3.3v or less for each led. the minimum output voltage depends on minimum t on and switching frequency. for example, if the minimum t on = 150ns and f sw = 1 mhz, then the minimum duty cycle is 15%. that m eans with v in = 24v, the minimum v out = 3.2v (one led). switching at lower frequency allows a wider range of v out , hence more flexible led configurations. this is shown in fig 10 . as a general rule, switching at lower frequencies allows a wider range of v out , and hence more flexible led configurations. this is shown in fig 10 . fig11 shows how the minimum and maximum output voltages vary with led current (assuming rds(on) = 0.4 , inductor dcr = 0.1 , and diode vf = 0.6 v). if the required output voltage is lower than that permitted by the minimum t on , the controller will automatically extend the t off , in order to maintain the correct duty cycle. this means that the switching frequency will drop lower when necessary, while the led current is kept in regulation at all times. 8.3.1 the number of led's that it can be driven with LC5830K now, the cs terminal voltage =0.2v is taken . when a v f of led to connect is set at 3.5v (max) , the number of serial led's of the string which can be driven, th ey are shown such as a fig 12 and a fig 13. fig.12 the limitation of vin at t off (min)=150nsec 0 5 10 15 20 25 30 35 40 45 0 0.5 1 1.5 2 2.5 vin(v) fsw(mhz) 1led 2led 3led 4led 5led 6led 7led 8led 9led 10led 11led 12led vin(limit) fig.10 minimum and maximum output voltage versus switching frequency (vin = 24 v, minimum ton and toff = 150 ns) fig.11 minimum and maximum output voltage v ersus iled current (vin = 9 v, f sw = 1 mhz, minimum t on and t off = 150 ns)
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 13 preliminary when a difference in voltage of the "output voltage vout" and the "input volt age vin" becomes small, a fig 12 shows the condition of vin that the "switching - off - period" reaches t off (min) =150nsec. you must avoid the condition which reaches t off (min) =150nsec fundamentally. if the switching - frequency rises more, you must make on - duty decrease and vin increase . but,the recommended operatin g conditions is vin Q 48v. therefore from the figure 12, the number of led serial connection, 9 leds are the limit in the whole area of the frequency which can be set up with r ton . if the frequency can be lowered, it is possible to use 10 - 12 leds serial connection. then you must set it up, the available vin ranges which is between "allowable min vin and 48v. fig.13 when the input voltage is high using a few led's, the limitation of vin by "ton (min) =150nsec". a fig 13 shows the condition that the "switching - on - period" reaches t on (min) =150nsec ,when the vin is high and using a few led's. because it is v out < lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 14 preliminary 8.4 thermal budgeting the LC5830K is capable of supplying a 3.0 a current through its high - side switch. however, depending on the duty cycle, the conduction loss in the high - side switch may cause the package to overheat. therefore care must be taken to ensure the total power loss of package is within budget. for exampl e, if the maximum tem perature rise allowed is t = 50 k at the device case surface, then the maximum po wer dissipation of the ic is 1.4 w. assuming the maximum r ds(on) = 0.4 and a duty cycle of 85 %, then the maximum led current is limited to 2.0 a ap proxima tely. at a lower duty cycle, the led current can be higher. 8.5 over current protection (ocp) the waveform in fig 1 4 illustrates how the LC5830K responds in the case in which the current sense resistor or the cs pin is shorted to gnd. note that the sw pin overcurrent protection is tripped at around 3.75 a, and the part shuts down immediately. the p art then goes through startup retry after approximately 380 s of cool - down period. it beco mes a hiccup mode like a fig 14. also LC5830K is tripped at 3.75atyp. f ig.14 LC5830K overcurrent protection tripped in the case of a fault caused by the sense resistor pin shorted to ground . 8.6 component selections ( peripheral parts) the inductor is often the most critical component in a buck converter. follow the procedure below to derive the correct parameters for the inductor . 8.6.1 selection of inductor 1) determine the saturation current of the inductor. this can be done by simply adding 20% to the average led current: i sat i led 1. 2 ??? (12) 2) determine the ripple current amplitude (peak - to - peak value). as a general rule, ripple current should be kept between 10% and 30% of the average led current: 0.1 S il / i led 0.3 ??? (13) 3) calculate the inductance based on the following equations: l = ( v in C v out ) d t / S il ??? (14) d = ( v out + v d1 ) / ( v in + v d1 ) ??? (15) where d is the duty cycle, t is the period 1/f sw , and v d1 is the forward voltage drop of the schottky diode d1 .(refer to fig9) 4) inductor selection chart the chart in fig 1 5 summarizes the relationship between led current, switching frequency, and inductor value. based on this chart: assuming led current = 2 a and fsw =1 mhz, then the minimum inductance required is l = 10 h in order to keep the ripple current at 30% or lower . (note: v out = v in / 2 is the worst case for ripple current). if the switching frequency is lower, then either a larger inductance must be used, or the ripple current requirement has to be relaxed. swtich node v sw (ch1, 10 v/div.), output voltage,v out (ch2, 10 v/div.), led current, iled (ch3, 1 a/div.), t = 100 s/div
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 15 preliminary fig.15 inductance selection based on i led and fsw ; v in = 24 v, v out = 12 v, S il io(i led ave) = 30% 8.6.2 the attention in selection of inductor . 1) for stability, as for the rate ( S il/iled) of inductor ripple current, 10% - 30 % is recommended. select inductor and switching frequency on the minimum vin condition so that the rate of inductor ripple current may go into this range. and, as a general value in the buck - type, as a setup of inductor, ' S il/iled=20% - 30 % ' is said as the 'a cost performance is the best.' 2) there is no hard limit on the highest ripple current percentage allowed. but, in this ic, the continuous current mode that is a dc superpos ed is recommended, it isn't the discontinuous current mode,the critical current mode. generally, it is possible that inductance is made small when the rate of S il/iled is enlarged. but, when inductance is lowered too much, the peak of inductor current may reach ocp threshould value. in this case, this ic can't do a normal operation. 3) obtain the data sheet of inductor manufacturer. and, select a part after you confirm that it isn't saturated by the current value when ocp activates. 4) generally, if inductan ce is the same, heat - generation of the winding - wire in inductor is lower whose contour is big. it is because a thicker wire can wind it in the window frame of the core. this means that dc resistance is lowered by the large section product of the winding - wire. 5) as for the structure of a inductor, in case of structure of open - magnetic - loop like a drum type, it is afraid of a bad influence that is given to emi and so on. the low leakage flux type inductor which has the struct ure of closed - magnetic - loop is recommended. 8.6.3 output filter capacitor the LC5830K is designed to operate without an output filter capacitor, in order to save cost. adding a large output capacitor is not recommended. in some applications, it may be required to add a small filter capacitor (up to several f) across the led string (between led+ and led - ) to reduce output ripple voltage and current. it is important to note that: ? when the large ripple current is flowing to the pattern, a c out capacitor avoids unstable condition of the ic's gnd electrical potent ial. ( decoupling capacitor ) ? the addition of this filter capacitor introduces a longer delay in led current during pwm dimming operation. therefore the maximum pwm dimming ratio is reduced. ? the filter capacitor should not be connected between led+ and gnd. doing so may create instability because the control loop must detect a certain amount of ripple current at the cs pin for regulation.
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 16 preliminary (b) with a c out across led string: ripple current through led string is reduced, while ripple voltage at cs pin remains high. fig.16 about the difference in the use of a c out and the un - use ( ripple current and ripple voltage ) operating condition 200 hz, v in = 24 v, v out = 15 v, f sw = 500 khz, l = 10 h, duty cycle = 50% ch1 ( red ) = vin (10 v/div), ch2 ( blue ) = v out (10 v/div), ch3 ( green ) = i led (500 ma/div), ch4 ( yellow ) = enable (5 v/div), time scale = 1 ms/div (a)without c out : ripple current through led string is proportional to ripple voltage at cs pin. fig.17a operation without using any output capacitor connected across the led string fig.17b operation with a 0.68 f ceramic capacitor (as a c out ) across the led string
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 17 preliminary 9. component placement and pcb layout guidelines 9.1 printing pattern drawing ( our company s circuit board for demonstration ) fig. 18 a pattern layout of demo - board ( double sided pcb parts mounting side ) fig.18 b pattern layout of demo - board(double sided pcb back side) double sided pcb ( copper foil thickness 35 m ? base material thickness 1.6mm ? contour 60mm 47mm) via hole ( 0.3 )
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 18 preliminary 9.2 the circuit diagram of demo - board fig.19 LC5830K the circuit diagram of demo - board vin=6 48v led string voltage P 15v fsw P 1mhz c1 47 f 50v c2 4.7 f 50v c4 0.1 f 50v c5 0.1 f 50v l1 10 h d1 sjpb - l6 sanken - electric co.,ltd. r1 140k r2 130m r3 200m r4 390m r5 750m ??? r2 r5 can be selecte d with a jumper pin of p1. note an op tional part for the experiment = c3 c6 c7 r 7 *1 r7 c6 the spe ed adjustment of dimming pulse ??? f or the experiment . *2 c7 it is made to decrease ripple current that is flowing to led. ??? f or the experimen t. *3 c3 f or the noise filter of the cs terminal - gnd terminal ??? f or the experimen t . c3, c6, c7 and r7 are handled as the delay elements against inputted dimming - pulse. pcb layout is critical in designing any switching regulator. a good layout reduces emitted noise from the switching device, a nd ensures better thermal performance and higher efficiency. the following guidelines help to obtain a high quality pcb layout. fi g 1 8a,fig18b show an example for components placement. fig20 shows the three critical current loops that should be minimized and connected by relatively wide traces. fig. 20 three different current loops in a buck converter 1) when the upper fet (integr ated inside the LC5830K) is on, current flows from the input supply/capacitors, through the upper fet, into the load via the output inductor, and back to ground as shown in loop 1. this loop should have relatively wide trac es. ideally this connection is made on both the top (component) layer and via the ground plane.
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 19 preliminary 2) when the upper fet is off, free - wheeling current flows from ground through the asynchronous diode d1, into the load via the output inductor, and back to ground as shown in loop 2. this loop should also be minimized and have relatively wide traces. ideally this connection is made on both the top (component) layer and via the ground plane. 3) the highest di/dt occurs at the instant the upper fet turns on and the asynchronous diode d1 undergoes reverse recovery as shown in loop 3. the input capacitors c in must deliver this high instantaneous current. c1 ( fig19 / electrolytic capacitor) should not be too far off c2 (fig19 /ceramic capacitor ) . therefore, the lo op from the ceramic input capacitor c2 through the upper fet and asynchronous diode to ground should be minimized. ideally this connection is made on both the top (component) layer and via the ground plane. 4) the voltage on the sw node (pin 8) transitions from 0 v to vin very quickly and may cause noise issues. it is best to place t he asynchronous diode and output inductor close to the LC5830K to minimize the size of the sw polygon. 5) keep sensitive analog signals (cs, and r1 /fig19 of switching frequency setting) away from the sw polygon. 6) for accurate current sensing, the led current sense resistor r sense ( r2 C r5/fig19) should be placed close to the ic. 7) place the boot strap capacitor c4 (fig19) near the boot node (pin 7) and keep the routing to this capacitor short. 8 ) when routing the input and o utput capacitors (c1, c2, and c 7/fig19 if used), use multiple vias to the ground plane and place the vias as close as possible to the LC5830K pads. 9) to minimize pcb losses and improve system efficiency, the input (vin) and output (v out ) traces should be wide and duplicated on multiple layers, if possible. 10) to improve thermal performance, use multiple layers for gnd. place as many vias as possible to the ground plane around the anode of the asynchronous diode. 11) the thermal pad under the LC5830K must connect to the ground plane using multiple vias. more vi as will insure lower operating temperature and higher efficiency. 9.3 optimizing thermal layout the features of the printed circuit board, including heat conduction and adjacent thermal sources such as other components, have a very significant effect on the thermal performance of the device. to optimize thermal performance, the following should be taken into account: ? the device exposed thermal pad should be connected to as much copper area as is available. ? copper thickness should be as high as pos sible (for example, 2 oz. or greater for higher power applications). ? the greater the quantity of thermal vias, the better the dissipation. if the expense of vias is a concern, studies have shown that concentrating the vias directly under the device in a tight pattern, as shown in fig 21 , has the greatest effect. ? additional exposed copper area on the opposite side of the board should be connected by means of the thermal vias. the copper should cover as much area as possible . ? other thermal sources should be placed as remote from the device as possible ? place as many vias as possible to the ground plane around the anode of the asynchronous diode. fig.21 suggested pcb layout for thermal optimization(maximum available bott om - layer copper recommended)
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 20 preliminary 10. typical characteristics (ta=25 c ) fig. 22 a startup waveforms v in = 19v fig.22b startup waveforms v in = 24v fig.22c startup waveforms v in = 30v fig. 23 a pwm dimming waveforms duty=50% fig. 23 b pwm dimming waveforms duty =2 % * operating condition 200hz, v in = 24 v, v out = 15 v, r1 = 63.4 k, duty cycle = 50% fig23a duty=50% , fig.23b duty=2% oscilloscope settings: ch1 ( red ) = vin (10 v/div), ch2 ( blue ) = vout (10 v/div), ch3 ( green ) = iled (500 ma/div), ch4 ( yellow ) = enable (5 v/div), time 1 ms/div ( fig. 23 a) 50 s/div ( fig. 23 b) f ig 23a,fig23b pwm operation at various duty cycles; note that there is no startup delay during pwm dimming operation * c3 c6 c7 r6 open *operating condition ledstring voltage = 15v, led current = 1.3a, r 1 = 63.4k ( switching frequency = 1mhz) v in = 19v( fig.22a ) v in = 24v( fig.22b ) v in = 30v( fig.22c ) oscilloscope settings : ch1 ( red ) = vin (10 v/div), ch2 ( blue ) = vout (10 v/div), ch3 ( green ) = iled (500ma/div), ch4 ( yellow ) = enable (5 v/div), time 50 s/div
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 21 preliminary fig.24 efficiency versus led current at various led voltages operating conditions:fsw=1mhz f ig.25 efficiency versus led current at various switching frequenciesoperating conditions: vin = 12 v, vout = 5.5 v fig.26 average led current versus pwm dimming percentage operating conditions: vin = 12 v, vout = 3.5 v, fsw = 1 mhz, fpwm = 200 hz, l = 10 h
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 22 preliminary 1 1 . the contents of packing specification. 1) reel packing figure (refer to fig25) emboss tape + reel 2) inner packing figure the material of packing : cardboard the number of parts : 3000pcs / reel 3) outer packing figure the material of packing : cardboard the number of inner boxes : 1 - 9 inner boxes / box 4) outer box the material of packing : cardboard the number of inner boxes: 3,6 or 9 inner boxes/box 5) remarks * it is processed so that the vibration and the shock at the time of transportation and handling of freight may be borne enough and damage may not be done to a product. * be protected to the dust under transportation or storage. 6) packing list *packing list is appended to the outside of each outer box. contents: parts number, order number, parts name, quantity *lot number is specified on the product. 11.1 reel drawing fig.27 reel drawing table.5 dimmensions of reel(units
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 23 preliminary 11.2 emboss tape drawing table.6 dimmension of emboss tape fig.28 emboss tape drawing 11.3 reel packing drawing fig. 29 reel packing drawing
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 24 preliminary table.7 pin 1 index location package carrier tape width parts per reel min trailer pockets min leader pockets cover tape width esoic - 8 1 2 mm 3 000 15 50 9 .3 mm
lc 5830k data sheet rev. 0.3 copy right: sanken electric co., ltd. page. 25 preliminary important notes ? the contents in this document are subject to changes, for improvement and other purposes, without notice. make sure that this is the latest revision of the document before use. ? application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products he rein and sanken can assume no responsibility for any infringement of industrial property rights, intellectual property rights or any other rights of sanken or any third party which may result from its use. ? although sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. users of sanken products are requested to take, at their own risk, preventative measures including safety design of the equipme nt or systems against any possible injury, death, fires or damages to the society due to device failure or malfunction. ? sanken products listed in this document are designed and intended for the use as components in general purpose electronic equipment or a pparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). when considering the use of sanken products in the applications where high er reliability is required (transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general purpose electron ic equipment or apparatus, please contact your nearest sanken sales representative to discuss , prior to the use of the products herein . the use of sanken products without the written consent of sanken in the applications where extremely high reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited. ? in the case that you use sanken semiconductor products or design your products by using sanken semiconductor products , the reliability largel y depends on the degree of derating to be made to the rated values. derating may be interpreted as a case that an operation range is set by derating the load from each rated value or surge voltage or noise is considered for derating in order to assure or i mprove the reliability. in general, derating factors include electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused due to self - heating of semiconductor products . for these stresses, instantaneous values, maximum values and minimum values must be taken into consideration. in addition, it should be noted that since power devices or ics including power devices have large self - heating value , the degree of derating of junction temperature affects the reliability significantly. ? when using the products specified herein by either (i) combining other products or materials therewith or (ii) physically, chemically or otherwise processing or treatin g the products, please duly consider all possible risks that may result from all such uses in advance and proceed therewith at your own responsibility. ? anti radioactive ray design is not considered for the products listed herein. ? sanken assumes no responsi bility for any troubles, such as dropping products caused during trans - portation out of sanken s distribution network . ? the contents in this document must not be transcribed or copied without sankens written consent.

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